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Stored-Program Computer Simulator
CPU Subunits and Datapath
The CPU acts as the brain of the computer. It is responsible for obtaining data and
instructions from memory, carrying out the instructions, and storing the results back in
memory. Each computer’s CPU can understand and execute a particular set of
instructions, known as that computer’s machine language. Programmers can control a
computer by defining instructions for its CPU— this is accomplished either by writing
programs directly in machine language, or by writing programs in a high-level language
and then translating them into machine language. Even programs that exhibit complex
behavior are specified to the CPU as sequences of simple machine-language commands,
each performing a task no more complicated than adding two numbers or copying data to
a new location. However, the CPU can execute these instructions at such a high speed
that complex programmatic behavior is achieved.
CPU Subunits
The CPU itself is comprised of several subunits, each playing a specific role in the
processor’s overall operation. These subunits are the Arithmetic Logic Unit (ALU), the
registers, and theControl Unit.
• The Arithmetic Logic Unit (ALU) is the collection of circuitry that performs actual
operations on data. Basic operations might include addition, subtraction, and bit
manipulations (such as shifting or combining bits).
• Registers are memory locations that are built into the CPU. Since registers are
integrated directly into the CPU circuitry, data in registers can be accessed more quickly
(as much as 5-10 times faster) than data in main memory can. However, due to the
limited number of registers in the CPU (commonly 16 or 32), these memory locations are
reserved for data that the CPU is currently using. To function efficiently, the computer
must constantly copy data back and forth between registers and main memory. These
transfers occur across collections of wires called a bus, which connects the registers to
main memory. A separate set of buses connect the registers to the ALU, allowing the
ALU to receive data for processing and then store the results of computations back in the
registers
• The Control Unit (CU) can be thought of as “the brain within the brain,” in that it
oversees the various functions of the CPU. The Control Unit is the circuitry in charge of
fetching data and instructions from main memory, as well as controlling the flow of data
from the registers to the ALU and back to the registers.
Figure 1: Central Processing Unit (CPU) subunits. Since ALU operations such as addition and
subtraction operate on two values, there are two buses connecting the registers to the ALU. The
result of the ALU operation is passed back to the registers via a single bus.
CPU Datapath Cycles
The path that data follows within the CPU, traveling along buses from registers to the
ALU and then back to registers, is known as the CPU datapath. Every task performed by
a computer, from formatting a document to displaying a page in a Web browser, is
broken down into sequences of simple operations; the computer executes each individual
operation by moving data from the registers to the ALU, performing computations on that
data within the ALU, and then storing the result in the registers. A single rotation around
the CPU datapath is referred to as a CPU datapath cycle, or CPU cycle.
CPU speed is defined as measuring the number of instructions that a CPU can carry out
in one second. Since each instruction requires a single CPU cycle to execute, we can infer
that a CPU’s speed will equal the number of CPU cycles that occur per second. For
example, an 800-MHz CPU can perform 800 million CPU cycles per second, whereas a
1.4-GHz CPU can perform 1.4 billion CPU cycles per second. However, CPUs cannot be
compared solely on the basis of their processor speeds. This is because two machine
languages might divide the same task into different sets of instructions, and one set might
be more efficient than the other. That is, one CPU might be able to complete a task in a
single cycle, whereas another might require several cycles to complete the same task. In
order to accurately evaluate a CPU’s performance, you must consider the instruction set
for that CPU, as well as the number of registers and the size of the buses that carry data
between components.
Stored-Program Computer
The key idea behind a stored-program computer is that tasks such as these can be
represented as instructions, stored in main memory along with data, and then carried out
by the Control Unit.
Machine Languages
A machine language is a set of binary codes corresponding to the basic tasks that a CPU
can perform. In essence, each machine-language instruction specifies how various
hardware components must be configured in order for a CPU cycle to perform a
particular computation. Thus, we could define machine-language instructions for our
simulator by enumerating all the physical settings of the knobs and switches. Since
machine-language instructions are stored in memory along with data, the instructions
must ultimately be represented as bit patterns.
Since the main memory locations in the simulator can hold a maximum of 16 bits, our
language represents each instruction as a 16-bit pattern. The initial bits indicate the type
of task that the CPU must perform, whereas the subsequent bits indicate the registers and/
or memory locations involved in the task. Since there are only four registers, two bits
suffice to represent a register number; since there are 32 main memory locations, five bits
suffice to represent a memory address. For instance, all instructions that involve adding
the contents of two registers begin with the bit pattern: 1010000100. The final six bits of an
addition instruction represent the destination register (i.e., the register where the result
will be stored) and the source registers (i.e., the registers whose contents will be added by
the ALU), respectively. As an example, suppose that you wanted to add the contents of
R0 and R1 and then store the result in R2—i.e., R2 = R0 + R1.
The bit patterns for R2 (2 = 102), R0 (0 = 002), and R1 (1 = 012) would be appended to
the initial bit pattern for addition (1010000100), yielding the machine-language instruction:
1010000100100001. Similarly, if the intent were R3 = R0 + R1, then the bit pattern for R3
(3 = 112) would replace that of R2: 1010000100110001.
The first two machine-language instructions in Figure above correspond to tasks that
users can perform with the CPU Datapath simulator—i.e., selecting an ALU operation to
be executed and the registers to be operated on during a CPU cycle. The next three
instructions correspond to tasks that users can perform with the datapath and memory
version of the simulator—i.e., controlling the flow of information between the main
memory and the datapath. The last instruction, HALT, tells the Control Unit when a
sequence of instructions terminates. Of course, a real CPU would require many more
instructions than these. For example, if a CPU executes programs that include
conditional statements (such as JavaScript if statements and while loops), its machine
language must support branching instructions that allow the CPU to jump from one
instruction to another. However, Figure 14.10’s limited instruction set is sufficient to
demonstrate the workings of a basic CPU and its Control Unit.
Control Unit
Once a uniform machine language for a particular CPU is established, instructions can be
stored in main memory along with data. It is the job of the Control Unit to obtain each
machinelanguage instruction from memory, interpret its meaning, carry out the specified
CPU cycle, and then move on to the next instruction. Since instructions and data are both
stored in the same memory, the Control Unit must be able to recognize where a sequence
of instructions begins and ends. In real computers, this task is usually performed by the
operating system, which maintains a list of each program in memory and its location. For
simplicity, your simulator assumes that the first instruction is stored in memory location
0. The end of the instruction sequence is explicitly identified using the HALT bit pattern.
In order to track the execution of an instruction sequence, the Control Unit maintains a
Program Counter (PC), which stores the address of the next instruction to be executed.
Since we are assuming that all programs start at address 0, the PC’s value is initialized to
0 before program execution begins. When the Control Unit needs to fetch and execute an
instruction, it accesses the PC and then obtains the instruction stored in the corresponding
memory location. After the Control Unit fetches the instruction, the PC is incremented so
that it identifies the next instruction in the sequence.
The steps carried out by the Control Unit can be defined as a general algorithm, in which
instructions are repeatedly fetched and executed:
Fetch-Execute Algorithm carried out by the Control Unit:
1. Initialize PC = 0.
2. Fetch the instruction stored at memory location PC, and set PC = PC + 1.
3. As long as the current instruction is not the HALT instruction:
a. Decode the instruction – that is, determine the CPU hardware settings required
to carry it out.
b. Configure the CPU hardware to match the settings indicated in the instruction.
c. Execute a CPU datapath cycle using those settings.
d. When the cycle is complete, fetch the next instruction from memory location
PC, and set PC = PC + 1.
For example, suppose that main memory contained the program and data for adding two
numbers in memory.
0: 1000000100000101 // load memory location 5 into R0
1: 1000000100100110 // load memory location 6 into R1
2: 1010000100100001 // add R0 and R1, store result in R2
3: 1000001001000111 // copy R2 to memory location 7
4: 1111111111111111 // halt
5: 0000000000001001 // data to be added: 9
6: 0000000000000001 // data to be added: 1
7: 0000000000000000 // location where sum is to be stored
The first five memory locations (addresses 0 through 4) contain machine-language
instructions for adding two numbers and storing their sum back in memory. The numbers
to be added are stored in memory locations 5 and 6. To execute this program, the Control
Unit would carry out the following steps:
1. First, the Program Counter is initialized: PC = 0.
2. The instruction at memory location 0 (corresponding to the current value of PC) is
fetched, and the PC is incremented: PC = 0 + 1 = 1.
3. Since this instruction (1000000100000101) is not a HALT instruction, it is decoded:
the CPU hardware is configured so that it will load the contents of memory location 5
into register R0, and a CPU cycle is executed.
4. The next instruction (at memory location 1, corresponding to the current value of PC)
is fetched, and the PC is incremented: PC = 1 + 1 = 2.
5. Since this instruction (1000000100100110) is not a HALT instruction, it is decoded:
the CPU hardware is configured so that it will load the contents of memory location 6
into register R1, and a CPU cycle is executed.
6. The next instruction (at memory location 2, corresponding to the current value of PC)
is fetched, and the PC is incremented: PC = 2 + 1 = 3.
7. Since this instruction (1010000100100001) is not a HALT instruction, it is decoded:
the CPU hardware is configured so that it will add the contents of registers R0 and R1
and store the result in register R2, and a CPU cycle is executed.
8. The next instruction (at memory location 3, corresponding to the current value of PC)
is fetched, and the PC is incremented: PC = 3 + 1 = 4.
9. Since this instruction (1000001001000111) is not a HALT instruction, it is decoded:
the CPU hardware is configured so that it will copy the contents of register R2 to
memory location 7, and a CPU cycle is executed.
10. The next instruction (at memory location 4, corresponding to the current value of PC)
is fetched, and the PC is incremented: PC = 4 + 1 = 5.
11. Since this instruction (1111111111111111) is a HALT instruction, the Control Unit
recognizes the end of the program and stops executing.
Stored-Program Computer Simulator
The Stored-Program Computer Simulator models the behavior of a complete, storedprogram
computer. Instructions and data can be entered into memory, with the first
instruction assumed to be at memory location 0. The Control Unit is responsible for
fetching and interpreting the machine-language instructions, as well as carrying out the
tasks specified by those instructions.
Your simulator Applet should contain several display boxes to illustrate the program and
data, the output, and buttons for actions.It should also contain text for the Program
Counter (PC) lists the address of the next instruction to be executed, the instruction
Register (IR), which lists the instruction that the Control Unit is currently executing.